roclib/src_base/Gpio.cxx (r4864/r4162)

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#include "base/Gpio.h"

//----------------------------------------------------------------------------

base::Gpio::Gpio(base::Board* board) :
  base::Peripheral(board)
{
}

//----------------------------------------------------------------------------

base::Gpio::~Gpio()
{
}

//----------------------------------------------------------------------------

int base::Gpio::setSyncBaud(int gpio_nr, uint32_t offset,
                           uint32_t odd, uint32_t even)
{
   uint32_t addr_offset[3] = {base::GPIO_SYNCM_BAUD_START,
                              base::GPIO_SYNCS0_BAUD_START,
                              base::GPIO_SYNCS1_BAUD_START};
   uint32_t addr_odd[3]    = {base::GPIO_SYNCM_BAUD1,
                              base::GPIO_SYNCS0_BAUD1,
                              base::GPIO_SYNCS1_BAUD1};
   uint32_t addr_even[3]   = {base::GPIO_SYNCM_BAUD2,
                              base::GPIO_SYNCS0_BAUD2,
                              base::GPIO_SYNCS1_BAUD2};

   if (gpio_nr < 1 || gpio_nr > 3) return -1;

   int rc = board().operPPP(addr_offset[gpio_nr-1], offset-1,
                            addr_odd[gpio_nr-1],    odd-1,
                            addr_even[gpio_nr-1],   even-1);
   return rc;
}

//----------------------------------------------------------------------------

int base::Gpio::setSyncBaud(int gpio_nr, uint32_t ratediv)
{
   uint32_t offset = ratediv/4;
   uint32_t odd    = ratediv/2;
   uint32_t even   = ratediv-odd;

   if (odd > 255 || even > 255) return -2;

   return setSyncBaud(gpio_nr, offset, odd, even);
}

//----------------------------------------------------------------------------

int base::Gpio::getSyncBaud(int gpio_nr, uint32_t& offset,
                           uint32_t& odd, uint32_t& even)
{
   uint32_t addr_offset[3] = {base::GPIO_SYNCM_BAUD_START,
                              base::GPIO_SYNCS0_BAUD_START,
                              base::GPIO_SYNCS1_BAUD_START};
   uint32_t addr_odd[3]    = {base::GPIO_SYNCM_BAUD1,
                              base::GPIO_SYNCS0_BAUD1,
                              base::GPIO_SYNCS1_BAUD1};
   uint32_t addr_even[3]   = {base::GPIO_SYNCM_BAUD2,
                              base::GPIO_SYNCS0_BAUD2,
                              base::GPIO_SYNCS1_BAUD2};

   if (gpio_nr < 1 || gpio_nr > 3) return -1;

   uint32_t offset_raw;
   uint32_t odd_raw;
   uint32_t even_raw;

   int rc = board().operGGG(addr_offset[gpio_nr-1], offset_raw,
                            addr_odd[gpio_nr-1],    odd_raw,
                            addr_even[gpio_nr-1],   even_raw);

   offset = offset_raw + 1;
   odd    = odd_raw    + 1;
   even   = even_raw   + 1;

   return rc;
}

//----------------------------------------------------------------------------

int base::Gpio::getSyncBaud(int gpio_nr, uint32_t& ratediv)
{
   uint32_t offset;
   uint32_t odd;
   uint32_t even;

   int rc = getSyncBaud(gpio_nr, offset, odd, even);
   ratediv = odd + even;
   return rc;
}

//----------------------------------------------------------------------------

int base::Gpio::setSyncScale(uint32_t val)
{
   return board().put(base::GPIO_SYNCM_SCALEDOWN, val);
}

//----------------------------------------------------------------------------

int base::Gpio::getSyncScale(uint32_t& val)
{
   return board().get(base::GPIO_SYNCM_SCALEDOWN, val);
}

//----------------------------------------------------------------------------

int base::Gpio::getConfig(uint32_t& mask)
{
   return board().get(base::GPIO_CONFIG, mask);
}

//----------------------------------------------------------------------------

int base::Gpio::setConfig(uint32_t mask)
{
   return board().put(base::GPIO_CONFIG, mask);
}

//----------------------------------------------------------------------------

int base::Gpio::setConfig(int gpio_nr, bool riseedge, bool falledge,
                         bool throttled, bool extrafunc, bool altin)
{
   uint32_t mask;
   int rc = getConfig(mask);
   if (rc) return rc;
   if (!packConfig(mask, gpio_nr, riseedge, falledge, throttled, 
                   extrafunc, altin)) return -1;
   rc = setConfig(mask);
   if (rc)  base::Board::operErrBuildInc(rc,1);
   return 0;
}

//----------------------------------------------------------------------------

bool base::Gpio::packConfig(uint32_t& mask, int gpio_nr, 
                           bool riseedge, bool falledge, 
                           bool throttled, bool extrafunc, 
                           bool altin)
{
   if (gpio_nr <2 || gpio_nr>7) return false;
  
   if (gpio_nr==2 || gpio_nr==3) {          // SYNC
     riseedge = riseedge | falledge;
     falledge = false;
   }

   mask = mask & (~(0xf<<(4*gpio_nr)));
   uint32_t submask = 0;
   if (riseedge)  submask |= 0x1;
   if (falledge)  submask |= 0x2;
   if (throttled) submask |= 0x4;
   if (extrafunc) submask |= 0x8;
   mask = mask | ( submask << (4*gpio_nr));

   if (gpio_nr >= 4) {                      // AUX
     uint32_t bitmask = 1<<(gpio_nr-4);
     mask = mask & (~bitmask);
     if (altin) mask |= bitmask;
   }

   return true;
}

//----------------------------------------------------------------------------

bool base::Gpio::unpackConfig(uint32_t mask, int gpio_nr, 
                             bool& riseedge, bool& falledge,
                             bool& throttled, bool& extrafunc, 
                             bool& altin)
{
   if (gpio_nr <2 || gpio_nr>7) return false;

   uint32_t submask = (mask >> (4*gpio_nr)) & 0xf;

   riseedge  = (submask & 0x1) != 0;
   falledge  = (submask & 0x2) != 0;
   throttled = (submask & 0x4) != 0;
   extrafunc = (submask & 0x8) != 0;

   if ((gpio_nr==2)||(gpio_nr==3)) {
      riseedge = riseedge | falledge;
      falledge = false;
   }

   altin = false;

   if (gpio_nr >= 4) {                      // AUX
     uint32_t bitmask = 1<<(gpio_nr-4);
     altin = (mask & bitmask) != 0;
   }

   return true;
}

//----------------------------------------------------------------------------

void base::Gpio::addAddrMap(base::Board* board)
{
   board->addRegAddrMapping("base::GPIO_CONFIG", base::GPIO_CONFIG);
   board->addRegAddrMapping("base::GPIO_SYNCM_SCALEDOWN", base::GPIO_SYNCM_SCALEDOWN);
   board->addRegAddrMapping("base::GPIO_SYNCM_BAUD_START", base::GPIO_SYNCM_BAUD_START);
   board->addRegAddrMapping("base::GPIO_SYNCM_BAUD1", base::GPIO_SYNCM_BAUD1);
   board->addRegAddrMapping("base::GPIO_SYNCM_BAUD2", base::GPIO_SYNCM_BAUD2);
   board->addRegAddrMapping("base::GPIO_SYNCS0_BAUD_START", base::GPIO_SYNCS0_BAUD_START);
   board->addRegAddrMapping("base::GPIO_SYNCS0_BAUD1", base::GPIO_SYNCS0_BAUD1);
   board->addRegAddrMapping("base::GPIO_SYNCS0_BAUD2", base::GPIO_SYNCS0_BAUD2);
   board->addRegAddrMapping("base::GPIO_SYNCS1_BAUD_START", base::GPIO_SYNCS1_BAUD_START);
   board->addRegAddrMapping("base::GPIO_SYNCS1_BAUD1", base::GPIO_SYNCS1_BAUD1);
   board->addRegAddrMapping("base::GPIO_SYNCS1_BAUD2", base::GPIO_SYNCS1_BAUD2);
}

//----------------------------------------------------------------------------


const char* base::Gpio::name(int n)
{
   static const char* gpio_names[base::NumGpio] = { "SYNC_M", "SYNC_S0", "SYNC_S1", "AUX0", "AUX1", "AUX2", "AUX3" };

   if ((n<0) || (n>=base::NumGpio)) return 0;

   return gpio_names[n];
}