00001 #include "TGet4Rec.h" 00002 00003 TGet4Rec::TGet4Rec() 00004 { 00005 // Synchronization check variables 00006 uEpochMainClockSinceLastSync = 0; 00007 uLastEpoch2 = 0; 00008 uRocEpochCycle = 0; 00009 uLocalEpochNb = 0; 00010 uLocalEpochCycle = 0; 00011 uUnsyncedEpochs = 0; 00012 uUnsyncedEpochsSinceLastSync = 0; 00013 cAutomaticFakeSyncSinceLastSync = 0; 00014 uModuloLastSynch = 0; 00015 uCycleLastSynch = 0; 00016 iInterChipEpochShiftLast = 0; 00017 00018 // Flags 00019 bDataLossSinceLastSync = kFALSE; 00020 bEpochLossSinceLastSync = kFALSE; 00021 bFirstEpochBlock = kTRUE; 00022 bValidEpochFlag.clear(); // Vector, 1 per buff 00023 bChipGotASync = kTRUE; 00024 bStoredHitUnp = kFALSE; 00025 00026 // Get4 Reset Test 00027 bJumpEpochBlockAfterReset = kFALSE; 00028 uNbEpochBlockAfterReset = 0; 00029 00030 // To survive missing events with a stream server 00031 bFirstSyncAfterEventJump = kFALSE; 00032 00033 // buffer of hit messages for the current rpc epoch block to be build next 00034 // First vector size depends on the number of buffers used 00035 // (typical 3) 00036 fCurrentEventMsg.clear(); // Vector, 1 per buff 00037 // unsigned integer giving which buffer to use when 00038 // unpacking messages from a chip 00039 uCurrentMessagesBuffer = 0; 00040 uEpochStart.clear(); // Vector, 1 per buff 00041 uCycleStart.clear(); // Vector, 1 per buff 00042 00043 bMessageInterBufferOk.clear(); // Vector, 1 per buff 00044 uCurrentMessageInterBuffer = 0; 00045 00046 // buffer of not validated hit messages from previous MBS events which could match new trigger 00047 // after validation hit messages are put in the vector in the RocRec object 00048 fCurrentUnprocessedMsg.clear(); // Vector, 1 per buff; 00049 // At the end of the event, messages accepted in trigger window but not validated are moved 00050 // in the output buffer to prevent data shifted because of buffering 00051 uNotValidatedMessagesAccepted = 0; 00052 00053 u_messageCountLastEpoch = 0; 00054 00055 iInterChipEpochShiftLast = 0; 00056 00057 // Histograms 00058 fGet4SyncSpacing = 0; // Non synced Epochs between synced Epochs 00059 fGet4SyncSpacingComp = 0; // Non synced Epochs between synced Epochs, corrected for sync losses versus uncorrected 00060 fGet4ValidEpochs = 0; // Nb of valid Epochs (chips synched) for each chip 00061 fGet4ValidSpacing = 0; // Non synced Epochs between synced valid Epochs 00062 fGet4InvalidSpacing = 0; // Non synced Epochs between synced invalid Epochs 00063 fGet4MessValidEpochs = 0; // Nb of Messages in valid Epochs 00064 fGet4AccMessNotValidated = 0; // Nb of messages matching the trigger accepted without valid epoch bec. event end! 00065 00066 fModuloSyncRoc = 0; // Evolution of the modulo for the ROC epoch with sync 00067 fModuloSyncLocal = 0; // Evolution of the modulo for the local epoch with sync 00068 fModuloSyncMainClock = 0; // Evolution of the modulo for the 250MHz epoch with sync 00069 00070 fInterChipSyncEpochShiftEvol = 0; // Inter chip epoch shift check 00071 00072 for(Int_t iChan = 0; iChan < NB_CHAN_GET4; iChan++) 00073 { 00074 u_nbConsLE[iChan] = 0; 00075 u_nbConsTE[iChan] = 0; 00076 00077 fGet4RisEdgesNbEvol[iChan] = 0; // Nb of rising edges depending on cycle/chan 00078 fGet4FalEdgesNbEvol[iChan] = 0; // Nb of falling edges depending on cycle/chan 00079 fGet4HitsNbEvolution[iChan] = 0; // Nb of matched hits depending on cycle/chan 00080 00081 // Debug! 00082 u_nbConsLE[iChan] = 0; 00083 u_nbConsTE[iChan] = 0; 00084 00085 fGet4FineTimeLE[iChan] = 0; // Finetime of Leading Edge 00086 fGet4FineTimeTE[iChan] = 0; // Finetime of Trailing Edge 00087 fGet4LeDnl[iChan] = 0; // DNL value for each bin 00088 fGet4LeDnlSum[iChan] = 0; // Integral of DNL value up to each bin 00089 fGet4TeDnl[iChan] = 0; // DNL value for each bin 00090 fGet4TeDnlSum[iChan] = 0; // Integral of DNL value up to each bin 00091 } 00092 }
1.7.1