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beamtime/gsi-aug12/get4v10/mbs/fpga_tdc.h (r4864/r3846)

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00001 /********************************************************************/
00002 /* Header structure for FPGA TDC readout                            */
00003 /* 9.11.2001 S.Linev - based on original code from N.Kurz           */
00004 /********************************************************************/
00005 
00006 #ifndef FPGA_TDC__H
00007 #define FPGA_TDC__H
00008 
00009 typedef struct 
00010 {
00011    long  volatile *pl_puls_ena;
00012    long  volatile *pl_dat_fifo;
00013    long  volatile *pl_trg_wind;
00014    long  volatile *pl_status;
00015    long  volatile *pl_reset;
00016    long  volatile *pl_ready_rst;
00017    long  volatile *pl_poss_rst;
00018    long  volatile *pl_trg_ena;
00019    long  volatile *pl_chan_ena;
00020 } sFPGA_TDC;
00021 
00022 
00023 int FPGA_TDC_getptr(sFPGA_TDC *self, long baseAddress);
00024 int FPGA_TDC_init(sFPGA_TDC *self);
00025 int FPGA_TDC_read(sFPGA_TDC *self, long *pl_data);
00026 
00027 #endif

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