beamtime/gsi-aug12/hd/mbs/cbmvme0.h (r4864/r3241)

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// 2010-09-28 - DE - setup of CBM VME crate
// 2011-08-26 - SL - IN_USE variable now defines usage of module in setup, not only memory mapping readout
// 2011-08-29 - SL - add third V1290 and V560 modules for NIHAM RPC setup
// 2011-09-07 - SL - change MADC assignment first two for Bucharest, last two for Dubna
// 2011-11-09 - SL - new setup for COSY
// 2012-02-21 - PAL - try to get it running for HD

#ifndef CBMVME_H
#define CBMVME_H

#define MAX__N_MOD   22

// VME id of trigger box (VULOM4)
#define VME__ID_TBOX   0

// VME id of TDC-1 - NIHAM
#define VME__ID_TDC1   1

// VME id of TDC-2 - NIHAM
#define VME__ID_TDC2   2

// VME id of TDC-3 - HD
#define VME__ID_TDC3   3

// VME id of TDC-4 - HD
#define VME__ID_TDC4   4

// VME id of TDC-5 - HD
#define VME__ID_TDC5   5

// VME id of TDC-6 - HZDR
#define VME__ID_TDC6   6

// VME id of TDC-7 - HZDR
#define VME__ID_TDC7   7

// VME id of TDC-8 - HZDR
#define VME__ID_TDC8   8

// VME id of FPGA TDC1
#define VME__ID_FPGA1  9

// VME id of FPGA TDC2
#define VME__ID_FPGA2 10

// VME id of FPGA TDC3
#define VME__ID_FPGA3 11

// VME id of FPGA TDC4
#define VME__ID_FPGA4 12

// VME id of FPGA TDC5
#define VME__ID_FPGA5 13

// VME id of FPGA TDC6
#define VME__ID_FPGA6 14

// VME id of FPGA TDC7
#define VME__ID_FPGA7 15

// VME id of V965 QDC2 HZDR
#define VME__ID_QDC1  16

// VME id of V965 QDC3 HZDR
#define VME__ID_QDC2  17

// VME id of 1182
#define VME__ID_1182  18

// VME id of 1183
#define VME__ID_1183  19

// VME id of QFW
#define VME__ID_QFW   20

// VME id of Scaler Or Multiplicity (VULOM3)
#define VME__ID_SCOM  21

// for each module: id, usage, base addr, addr modifier, two long words as prefixes in data
// usage means: 0 - not used, 1 - master crate, 2 - slave crate
#define VME__MODULES {  VME__ID_TBOX,  1, 0x08000000, 0x09, 0x74726c6f, 0x6f6c7274, \
                        VME__ID_TDC1,  0, 0x0B000000, 0x09, 0x74646331, 0x31636474, \
                        VME__ID_TDC2,  0, 0x0C000000, 0x09, 0x74646332, 0x32636474, \
                        VME__ID_TDC3,  0, 0x0D000000, 0x09, 0x74646333, 0x33636474, \
                        VME__ID_TDC4,  0, 0x0E000000, 0x09, 0x74646334, 0x34636474, \
                        VME__ID_TDC5,  0, 0x0F000000, 0x09, 0x74646335, 0x35636474, \
                        VME__ID_TDC6,  0, 0x11000000, 0x09, 0x74646336, 0x36636474, \
                        VME__ID_TDC7,  0, 0x12000000, 0x09, 0x74646337, 0x37636474, \
                        VME__ID_TDC8,  0, 0x13000000, 0x09, 0x74646338, 0x38636474, \
                        VME__ID_FPGA1, 0, 0x03000000, 0x09, 0x66706731, 0x31677066, \
                        VME__ID_FPGA2, 0, 0x04000000, 0x09, 0x66706732, 0x32677066, \
                        VME__ID_FPGA3, 0, 0x05000000, 0x09, 0x66706733, 0x33677066, \
                        VME__ID_FPGA4, 0, 0x06000000, 0x09, 0x66706734, 0x34677066, \
                        VME__ID_FPGA5, 1, 0x07000000, 0x09, 0x66706735, 0x35677066, \
                        VME__ID_FPGA6, 1, 0x09000000, 0x09, 0x66706736, 0x36677066, \
                        VME__ID_FPGA7, 1, 0x0A000000, 0x09, 0x66706737, 0x37677066, \
                        VME__ID_QDC1,  0, 0x0A000000, 0x09, 0x71646332, 0x32636471, \
                        VME__ID_QDC2,  0, 0x0B000000, 0x09, 0x71646333, 0x33636471, \
                        VME__ID_1182,  0, 0x00600000, 0x39, 0x31313832, 0x32383131, \
                        VME__ID_1183,  0, 0x00700000, 0x39, 0x31313833, 0x33383131, \
                        VME__ID_QFW,   0, 0x07000000, 0x09, 0x71667731, 0x31776671, \
                        VME__ID_SCOM,  1, 0x13000000, 0x09, 0x73636f6d, 0x6d6f6373}

#endif