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onlinemonitor/rocmonitor/TRocProc.h (r4864/r3817)

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00001 #ifndef TROCPROC_H
00002 #define TROCPROC_H
00003 
00004 #include "roc/Iterator.h"
00005 
00006 #include <vector>
00007 #include <stdint.h>
00008 
00009 #include "TCBMBeamtimeProc.h"
00010 
00011 #include "roc/Message.h"
00012 #include "roc/Board.h"
00013 
00014 class TRocParam;
00015 class TPedestalExtractor;
00016 class TGo4MbsSubEvent;
00017 class TGet4MessageFull;
00018 
00019 #include "TRocEvent.h"
00020 #include "TRocRec.h"
00021 #include "TGet4Rec.h"
00022 
00023 
00024 class TRocProc : public TCBMBeamtimeProc {
00025    public:
00026       TRocProc();
00027       TRocProc(const char* name);
00028       virtual ~TRocProc() ;
00029 
00030       virtual void InitEvent(TGo4EventElement * evt);
00031 
00032       virtual void ProcessSubevent(TGo4MbsSubEvent* subevt);
00033 
00034       virtual void FinalizeEvent();
00035 
00036    protected:
00037 
00039       virtual void ProcessNxHit(roc::Message* msg, Double_t nxadc_corr) {}
00040 
00042       void ProcessExtendedMessage(unsigned rocid, TRocData* rocevent, TRocMessageExtended& msg, bool with_unprocessed = true);
00043 
00044       void ProcessTriggerMessage(TRocData* rocevent, int rocid, uint64_t fulltm);
00045       
00046       void HandleUnprocessedMessages(TRocData* rocevent, int rocid);
00047 
00048       void LoadPedestalFile(const char* fname);
00049       void SavePedestalFile(const char* fname);
00050 
00052       Bool_t ProcessGet4EpochMessage(UInt_t uRocId, TRocData* rocEvent, UInt_t uGet4IndexOffset, roc::Message* mesData);
00053       Bool_t ProcessGet4DataMessage(UInt_t uRocId, UInt_t uGet4IndexOffset, roc::Message* mesData);
00054       Bool_t ProcessGet4ExtSyncMessage(UInt_t uGet4IndexOffset, roc::Message* mesData);
00055       Bool_t TimeOrderMessageBuffer( TRocData* rocToSort);
00056       
00057       Bool_t PrintRocEpochIndexes(Int_t uMessagePriority = 0);
00058       Bool_t PrintRocEpochCycles(Int_t uMessagePriority = 0);
00059       Bool_t PrintLocalEpochIndexes(Int_t uMessagePriority = 0);
00060       Bool_t PrintLocalEpochCycles(Int_t uMessagePriority = 0);
00061       Bool_t PrintUnsynchronizedEpochCount(Int_t uMessagePriority = 0);
00062       Bool_t PrintTotalUnsynchronizedEpochCount(Int_t uMessagePriority = 0);
00063       Bool_t PrintMessageBufferIndexes(Int_t uMessagePriority = 0);
00064       Bool_t PrintMessageBufferSizes(Int_t uMessagePriority = 0);
00065 
00066       /* after event completion reset until next triggers are found*/
00067       void ResetTrigger();
00068 
00069       /* after all input buffers are done, we reset end of buffer flag*/
00070       void ResetEndOfBuffer();
00071 
00072       //      /* subfunction which is called when trigger window is fullfilled.*/
00073       //      void ProcessTriggeredData(TRocMessageExtended& msg);
00074 
00075       Bool_t AssertRoc(unsigned rocid)
00076       {
00077          if(rocid >= MAX_ROC) return kFALSE;
00078          if(TRocEvent::ConfigRocs[rocid]==0) return kFALSE;
00079          return kTRUE;
00080       }
00081 
00082       Bool_t AssertNX(unsigned nxid)
00083       {
00084          if(nxid < MAX_NX) return nx_use_mask[nxid];
00085          return kFALSE;
00086       }
00087 
00088       Bool_t AssertGET4(unsigned indx)
00089       {
00090          if (indx < MAX_GET4) return get4_use_mask[indx];
00091          return kFALSE;
00092       }
00093 
00094 
00095       TRocParam     *fParam;
00096 
00097 //      roc::Iterator & fIter;
00098 //      roc::Iterator fDefaultIter;
00099 
00100       TPedestalExtractor *fPedestals;
00101 
00102       Bool_t fIsTimeSorted; // true if messages within mbs container are strictly time sorted
00103 
00104       unsigned       fNumRocs;
00105 
00106       bool           nx_use_mask[MAX_NX];
00107 
00108       bool           get4_use_mask[MAX_GET4];
00109 
00110       TH1           *fEvntSize;
00111 
00112       TH1           *fAUX2_R01; // difference between AUX2 signals on ROC0 and ROC1
00113 
00114       TH1           *fSYNC_R0_R10; // difference between SYNC0 on ROC10 - SYNC1 on ROC0
00115 
00116       TH1           *fMsgsPerRoc;
00117       TH1           *fTriggerPerRoc;
00118 
00119       TH1* fDeltaTriggerTime; // absolute time difference of all hits with respect to global trigger
00120       TGo4WinCond* fGlobalTriggerWind; // time window to assign hits to output event (relative to last global trigger)
00121       TGo4WinCond* fGlobalAUXWind; // time window to assign AUX to output event (relative to last global trigger)
00122 
00123       ULong_t fTotaldatasize;
00124 
00125       UInt_t         fCurrEvntTm;
00126 
00127       Double_t       fLastRateTm; // last time of rate measurement
00128       Double_t       fRate;       // currently calculated rate
00129 
00130       std::vector<TRocRec> ROC;  
00131       TRocEvent * fOutputEvent;  
00132       Bool_t fFirstSubEvent;     
00133 
00134       Bool_t fHasNewGlobalTrigger; 
00135       unsigned fTriggerCounter; 
00136       
00137 
00140       std::vector<TGet4Rec> FECHIP;        
00141       // General counters (allow for example event jumps by stream server)
00142       UInt_t     printData;
00143       UInt_t     uNbEvents[MAX_ROC];
00144       UInt_t     uFirstEventIndex[MAX_ROC];
00145       UInt_t     uPrevEventIndex[MAX_ROC];
00146       
00147       // Intermediate event buffer for later splitting analysis
00148       std::vector< std::vector<TRocMessageExtended> > vMessageInterBuffer;
00149       std::vector<TRocMessageExtended>                vMessageEventBuffer;
00150       UInt_t uCurrentBlockBuffer;      // unsigned integer giving which buffer to use when
00151                                        // sorting hits from a chip  
00152       Bool_t bTransferMessageNext;
00153       UInt_t  uEpochBufferStart; // Start of each message buffer
00154       UInt_t  uCycleBufferStart; // Start of each message buffer  
00155 
00156       // buffer of not validated hit messages from previous MBS events which could match new trigger
00157       std::vector< std::vector<TRocMessageExtended> > vMessageInterBufferUnprocessed;
00158       std::vector< std::vector<TRocMessageExtended> > vUnprocessedMessages;
00159       
00160       // Variables
00161       UInt_t     uLastEpochMainClock; // Main 250MHz clock epoch counter
00162       UInt_t     uMainEpochCycle;     // Main 250MHz clock epoch counter cycle
00163       UInt_t     uCurrentEpoch2;     // Last Epoch Nb from ROC message (global)
00164       UInt_t     uCurrentCycle2;     // Last Epoch Cycle Nb from ROC message (global)
00165          // Automatic GET4 chip failure detection
00166       UInt_t     uRocEpochFirstSyncedChip;
00167       UInt_t     uRocCycleFirstSyncedChip;
00168          // GET4 reset recovery
00169       ULong64_t  uEpochFirstSyncAfterReset;
00170       UInt_t     uCycleFirstSyncAfterReset;
00171       
00172       // Histograms
00173       TH1 *fGet4SynchChip;           // Get4 System Ext synch chip
00174       TH1 *fGet4ErrorChip;           // Get4 System Error chip
00175       TH2 *fGet4SynchPatt;           // Get4 System Ext synch pattern
00176       TH2 *fGet4ErrorPatt;           // Get4 System Error pattern
00177       
00178       TH1 *fGet4DataLoss;            // Epochs with data Loss
00179       TH1 *fGet4EpochLoss;           // Epochs with Loss of Epochs in ROC buffer      
00180       TH2 *fNbMissedSync;
00181       
00182       TH2 *fGet4EdgeMessagePerRawEvent; // Nb of accepted edge message per event
00183       TH2 *fGet4NotValidMessRawEvent;   // Nb of not validated accepted edge message per event
00184 
00185       TH1 *fGet4RisEdgesNb;          // Nb of rising  edges for each channel
00186       TH1 *fGet4FalEdgesNb;          // Nb of falling edges for each channel
00187       TH2 *fGet4EdgesDiffEvol;       // diff nb of rising & falling edges for each cycle/channel
00188       TH1 *fGet4RisEdgesEvol;        // Total nb of rising  edges for each cycle
00189       TH1 *fGet4FalEdgesEvol;        // Total nb of falling edges for each cycle
00190 
00191       TH2 *fMapEpochsMain;
00192       TH2 *fMapEpochsRoc;
00193       TH2 *fMapEpochsLocal;
00194       TH1 *fDistribEpochsMain;
00195       TH2 *fDistribEpochsRoc;
00196       TH2 *fDistribEpochsLocal;
00197       
00198       // Automatic GET4 chip failure detection
00199       TH2 *fInterChipSyncEpochShift; // Inter chip epoch shift check
00200       
00201       // Control over Automatic reset
00202       UInt_t uIndexResetGet4; // AUTO reset
00203 
00204    private:
00205 
00210       /*#  TRocRec lnkTRocRec; */
00211       /*#  TGet4Rec lnkTGet4Rec; */
00212 
00213 
00214       ClassDef(TRocProc,1)
00215 };
00216 
00217 #endif //TUNPACKPROCESSOR_H
00218 

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