beamtime/tof-tdctest/mbs/cbmvme.h (r4864/r4267)

Go to the documentation of this file.

// 2010-09-28 - DE - setup of CBM VME crate
// 2011-08-26 - SL - IN_USE variable now defines usage of module in setup, not only memory mapping readout
// 2011-08-29 - SL - add third V1290 and V560 modules for NIHAM RPC setup
// 2011-09-07 - SL - change MADC assignment first two for Bucharest, last two for Dubna
// 2011-11-09 - SL - new setup for COSY
// 2012-02-21 - PAL - try to get it running for HD

#ifndef CBMVME_H
#define CBMVME_H

#define MAX__N_MOD   19

// VME id of trigger box (VULOM4)
#define VME__ID_TBOX  0

// VME id of TDC-1 - NIHAM
#define VME__ID_TDC1  1

// VME id of TDC-2 - NIHAM
#define VME__ID_TDC2  2

// VME id of TDC-3 - HD
#define VME__ID_TDC3  3

// VME id of TDC-4 - HD
#define VME__ID_TDC4  4

// VME id of TDC-5 - HD
#define VME__ID_TDC5  5

// VME id of TDC-6 - HZDR
#define VME__ID_TDC6  6

// VME id of TDC-7 - HZDR
#define VME__ID_TDC7  7

// VME id of TDC-8 - HZDR
#define VME__ID_TDC8  8

// VME id of FPGA TDC1
#define VME__ID_FPGA1  9

// VME id of FPGA TDC2
#define VME__ID_FPGA2  10

// VME id of FPGA TDC3
#define VME__ID_FPGA3 11

// VME id of FPGA TDC4
#define VME__ID_FPGA4 12

// VME id of V965 QDC1 HZDR
#define VME__ID_QDC1 13

// VME id of V965 QDC2 HZDR
#define VME__ID_QDC2 14

// VME id of V965 QDC3 HZDR
#define VME__ID_QDC3 15

// VME id of 1182
#define VME__ID_1182 16

// VME id of 1183
#define VME__ID_1183 17

// VME id of QFW
#define VME__ID_QFW 18

// for each module: id, usage, base addr, addr modifier, two long words as prefixes in data
// usage means: 0 - not used, 1 - master crate, 2 - slave crate
#define VME__MODULES {  VME__ID_TBOX,  1, 0x8000000, 0x09, 0x00000000, 0x00000000, \
                        VME__ID_TDC1,  1, 0xA000000, 0x09, 0x74646331, 0x31636474, \
                        VME__ID_TDC2,  1, 0xB000000, 0x09, 0x74646332, 0x32636474, \
                        VME__ID_TDC3,  0, 0xC000000, 0x09, 0x74646333, 0x33636474, \
                        VME__ID_TDC4,  0, 0x8000000, 0x09, 0x74646334, 0x34636474, \
                        VME__ID_TDC5,  0, 0x9000000, 0x09, 0x74646335, 0x35636474, \
                        VME__ID_TDC6,  0, 0xA000000, 0x09, 0x74646336, 0x36636474, \
                        VME__ID_TDC7,  0, 0xB000000, 0x09, 0x74646337, 0x37636474, \
                        VME__ID_TDC8,  0, 0xC000000, 0x09, 0x74646338, 0x38636474, \
                        VME__ID_FPGA1, 0, 0x3000000, 0x09, 0x66706731, 0x31677066, \
                        VME__ID_FPGA2, 0, 0x4000000, 0x09, 0x66706732, 0x32677066, \
                        VME__ID_FPGA3, 0, 0x5000000, 0x09, 0x66706733, 0x33677066, \
                        VME__ID_FPGA4, 0, 0x6000000, 0x09, 0x66706734, 0x34677066, \
                        VME__ID_QDC1,  0, 0x9000000, 0x09, 0x71646331, 0x31636471, \
                        VME__ID_QDC2,  0, 0xA000000, 0x09, 0x71646332, 0x32636471, \
                        VME__ID_QDC3,  0, 0xB000000, 0x09, 0x71646333, 0x33636471, \
                        VME__ID_1182,  0, 0x0600000, 0x39, 0x31313832, 0x32383131, \
                        VME__ID_1183,  0, 0x0700000, 0x39, 0x31313833, 0x33383131, \
                        VME__ID_QFW,   0, 0x7000000, 0x09, 0x71667731, 0x31776671  }

#endif