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include/nxyter/MainAdc.h (r4864/r4162)

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00001 //============================================================================
00006 //============================================================================
00007 
00008 #ifndef NXYTER_MAINADC_H
00009 #define NXYTER_MAINADC_H
00010 
00011 #include <iostream>
00012 
00013 #include "base/Peripheral.h"
00014 
00015 namespace nxyter {
00016 
00017    class MainAdc : public base::Peripheral {
00018       protected:
00019          int     fUseSPI;                   
00020          int     fPort;                     
00021          bool    fMode4nx;                  
00022 
00023       public:
00024          MainAdc();
00025          MainAdc(base::Board* board, int port, bool mode4nx=false);
00026          virtual ~MainAdc();
00027 
00028          bool isSPI() const { return fUseSPI; }
00029 
00030          int setRegister(uint8_t reg, uint8_t val, bool veri=false);
00031          int getRegister(uint8_t reg, uint8_t& val);
00032 
00033          int setTestMode(int ch, uint8_t mode);
00034          int setUserPattern(uint16_t pat);
00035 
00036          int probe();
00037          int setToDefault();
00038          void printRegisters(std::ostream& os);
00039 
00040          int setChannelMux(int nxnum, uint32_t val);
00041          int setChannelLatency(int nxnum, uint32_t val);
00042          int getChannelLatency(int nxnum, uint32_t& val);
00043 
00044          static void calcClockDelayRegs(uint32_t delay, uint32_t& sr_init, uint32_t& bufg_select);
00045          static uint32_t findClockDelay(uint32_t sr_init, uint32_t bufg_select);
00046 
00047          int setClockDelay(uint32_t val);
00048          int setClockDelaySrInit(uint32_t val);
00049          int getClockDelaySrInit(uint32_t& val);
00050          int setClockDelayBufg(uint32_t val);
00051          int getClockDelayBufg(uint32_t& val);
00052 
00053          int getAdcDirect(int num, uint32_t& val);
00054 
00055          static const char* registerName(int reg);
00056 
00058          enum adcRegs {
00059            kReg_chip_port_config =  0x00,
00060            kReg_chip_id          =  0x01,
00061            kReg_chip_grade       =  0x02,
00062            kReg_device_index_A   =  0x05,
00063            kReg_modes            =  0x08,
00064            kReg_clock            =  0x09,
00065            kReg_test_io          =  0x0d,
00066            kReg_output_mode      =  0x14,
00067            kReg_output_adjust    =  0x15,
00068            kReg_output_phase     =  0x16,
00069            kReg_user_patt1_lsb   =  0x19,
00070            kReg_user_patt1_msb   =  0x1a,
00071            kReg_user_patt2_lsb   =  0x1b,
00072            kReg_user_patt2_msb   =  0x1c,
00073            kReg_serial_control   =  0x21,
00074            kReg_serial_ch_stat   =  0x22,
00075            kReg_device_update    =  0xff
00076          };
00077 
00078          static void addAddrMap(base::Board* board);
00079 
00080    };
00081 
00082 }
00083 
00085 
00089 inline std::ostream& operator<<(std::ostream& os, nxyter::MainAdc& obj)
00090   { obj.printRegisters(os); return os; }
00091 
00092 #endif

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