00001 #ifndef TVFTXPROC_H 00002 #define TVFTXPROC_H 00003 00004 #include "TGsiAug12Analysis.h" 00005 #include "TCBMBeamtimeProc.h" 00006 #include "TMbsCrateEvent.h" 00007 #include "TTriglogEvent.h" 00008 #include "TVftxEvent.h" 00009 #include "TVftxParam.h" 00010 #include "../../mbs/cbmvme.h" 00011 00012 00013 #include "TGo4Picture.h" 00014 #include "TH1.h" 00015 #include "TH2.h" 00016 00017 #include "TFile.h" 00018 #include "TTree.h" 00019 #include <fstream> 00020 #include <vector> 00021 00022 #define NB_BIN_FTS 1024 00023 #define CLOCK_TIME 5000 //ps 00024 00025 #define SYNCH_CHANNEl 0 00026 00027 class TGo4EventElement; 00028 class TGo4MbsSubEvent; 00029 00030 class TVftxProc : public TCBMBeamtimeProc { 00031 // friend class TCBMBeamtimeProc; 00032 public: 00033 TVftxProc(const char* name = 0); 00034 virtual ~TVftxProc(); 00035 virtual void InitEvent(TGo4EventElement*); 00036 //virtual void BuildEvent(TGo4MbsSubEvent* subevt ); // event processing function 00037 void BuildMyEvent(); 00038 virtual void FinalizeEvent(); 00039 void clear_tree_var(); 00040 void add_hit(Int_t, Int_t, UInt_t, UInt_t, UInt_t ); 00041 void print_hit(Int_t, Int_t, UInt_t, UInt_t, UInt_t ); 00042 private: 00043 00044 //creating a root variables 00045 std::vector<Double_t> *vTimecorr; 00046 std::vector<Double_t> *vFineTimecorr; 00047 00048 // for each FPGA TDC we have header information 00049 // for each FPGA TDC channel we have coarse time, fine time, and future bit 00050 // it is multi-hit tdc so we need additional index 00051 UInt_t event_nr; 00052 Int_t headTime[MAX_FPGA_TDC]; 00053 Int_t mult[MAX_FPGA_TDC][FPGA_TDC_NBCHAN]; // how many hits par channel 00054 Int_t fineTime[MAX_FPGA_TDC][FPGA_TDC_NBCHAN][TVftxBoardData::MaxMult]; 00055 Int_t coarseTime[MAX_FPGA_TDC][FPGA_TDC_NBCHAN][TVftxBoardData::MaxMult]; 00056 UInt_t futureBit[MAX_FPGA_TDC][FPGA_TDC_NBCHAN][TVftxBoardData::MaxMult]; 00057 00058 // Tree outputs 00059 TString sOutputFilename; 00060 TDirectory* oldDir; 00061 TFile* fRootOut; 00062 TTree* rawTree; 00063 00064 Int_t iFirstTime[MAX_FPGA_TDC][FPGA_TDC_NBCHAN]; 00065 Int_t iFirstCoarse[MAX_FPGA_TDC][FPGA_TDC_NBCHAN]; 00066 Int_t iFirstFine[MAX_FPGA_TDC][FPGA_TDC_NBCHAN]; 00067 Int_t iLastTime[MAX_FPGA_TDC][FPGA_TDC_NBCHAN]; 00068 Int_t iLastToT[MAX_FPGA_TDC][FPGA_TDC_NBCHAN]; 00069 Int_t iTriggerTime[MAX_FPGA_TDC]; 00070 00071 Int_t iNbHitsForCalib[MAX_FPGA_TDC][FPGA_TDC_NBCHAN]; 00072 Double_t dCorr[MAX_FPGA_TDC][FPGA_TDC_NBCHAN][TDC_FIFO_FINE_CT+1]; 00073 Double_t dFirstTimecorr[MAX_FPGA_TDC][FPGA_TDC_NBCHAN]; 00074 Double_t dFirstFineTimecorr[MAX_FPGA_TDC][FPGA_TDC_NBCHAN]; 00075 Double_t dTimeCorr[MAX_FPGA_TDC][FPGA_TDC_NBCHAN][TVftxBoardData::MaxMult]; 00076 Double_t dFineTimeCorr[MAX_FPGA_TDC][FPGA_TDC_NBCHAN][TVftxBoardData::MaxMult]; 00077 00078 UInt_t uTotalMultiplicity[MAX_FPGA_TDC][FPGA_TDC_NBCHAN]; 00079 00080 TFile* fileCalibrationIn; 00081 TH1 *fInitialCalibHisto[MAX_FPGA_TDC][ FPGA_TDC_NBCHAN ]; 00082 00083 TH1 *bitcontrol[MAX_FPGA_TDC][ FPGA_TDC_NBCHAN ]; 00084 TH1 *bitcontrolCoarse[MAX_FPGA_TDC][ FPGA_TDC_NBCHAN ]; 00085 TH1 *fEventSizeHeader1[MAX_FPGA_TDC]; 00086 TH1 *fEventSizeHeader2[MAX_FPGA_TDC]; 00087 TH1 *fTriggerType[MAX_FPGA_TDC]; 00088 TH1 *fTriggerTime[MAX_FPGA_TDC]; 00089 00090 TH1 *fChanUsage[MAX_FPGA_TDC]; 00091 TH1 *fChanEvents[MAX_FPGA_TDC]; 00092 TH1 *fChanDouble[MAX_FPGA_TDC]; 00093 TH1 *fChanFuture[MAX_FPGA_TDC]; 00094 TH2 *fChanMultip[MAX_FPGA_TDC]; 00095 00096 TH1 *fTime[MAX_FPGA_TDC][ FPGA_TDC_NBCHAN ]; 00097 TH1 *fToT[MAX_FPGA_TDC][ FPGA_TDC_NBCHAN ]; 00098 00099 TH1 *fFineTime[MAX_FPGA_TDC][ FPGA_TDC_NBCHAN ]; 00100 TH1 *fDnlCorr[MAX_FPGA_TDC][ FPGA_TDC_NBCHAN ]; 00101 TH1 *fCoarseTime[MAX_FPGA_TDC][ FPGA_TDC_NBCHAN ]; 00102 00103 TH2 *fFineTimeEvo[MAX_FPGA_TDC][ FPGA_TDC_NBCHAN ]; 00104 TH2 *fBinSizeEvo[MAX_FPGA_TDC][ FPGA_TDC_NBCHAN ]; 00105 UInt_t uInitialMbsTime; 00106 UInt_t uInitialVulomSync; 00107 00108 // TH2 *fChannelStripMapping; 00109 TH2 *fTdcChanStripMapping[ MAX_FPGA_TDC*(MAX_FPGA_TDC+1)/2 ]; 00110 Int_t iMapIndex; 00111 00112 protected: 00113 00114 TVftxParam * fPar; 00115 TMbsCrateEvent * fCrateInputEvent; 00116 TVftxEvent * fOutputEvent; 00117 TTriglogEvent* fTriglogInputEvent; 00118 00119 protected: 00120 00121 ClassDef(TVftxProc,1) 00122 }; 00123 00124 #endif //TVFTXPROC_H 00125
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