(r4864/r3381)
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Defines | |
| #define | MAX__N_MOD 19 |
| #define | VME__ID_TBOX 0 |
| #define | VME__ID_TDC1 1 |
| #define | VME__ID_TDC2 2 |
| #define | VME__ID_TDC3 3 |
| #define | VME__ID_TDC4 4 |
| #define | VME__ID_TDC5 5 |
| #define | VME__ID_TDC6 6 |
| #define | VME__ID_TDC7 7 |
| #define | VME__ID_TDC8 8 |
| #define | VME__ID_FPGA1 9 |
| #define | VME__ID_FPGA2 10 |
| #define | VME__ID_FPGA3 11 |
| #define | VME__ID_FPGA4 12 |
| #define | VME__ID_QDC1 13 |
| #define | VME__ID_QDC2 14 |
| #define | VME__ID_QDC3 15 |
| #define | VME__ID_1182 16 |
| #define | VME__ID_1183 17 |
| #define | VME__ID_QFW 18 |
| #define | VME__MODULES |
Define Documentation
| #define VME__MODULES |
Value:
{ VME__ID_TBOX, 1, 0x8000000, 0x09, 0x00000000, 0x00000000, \
VME__ID_TDC1, 1, 0xA000000, 0x09, 0x74646331, 0x31636474, \
VME__ID_TDC2, 1, 0xB000000, 0x09, 0x74646332, 0x32636474, \
VME__ID_TDC3, 0, 0xC000000, 0x09, 0x74646333, 0x33636474, \
VME__ID_TDC4, 0, 0x8000000, 0x09, 0x74646334, 0x34636474, \
VME__ID_TDC5, 0, 0x9000000, 0x09, 0x74646335, 0x35636474, \
VME__ID_TDC6, 0, 0xA000000, 0x09, 0x74646336, 0x36636474, \
VME__ID_TDC7, 0, 0xB000000, 0x09, 0x74646337, 0x37636474, \
VME__ID_TDC8, 0, 0xC000000, 0x09, 0x74646338, 0x38636474, \
VME__ID_FPGA1, 0, 0x3000000, 0x09, 0x66706731, 0x31677066, \
VME__ID_FPGA2, 0, 0x4000000, 0x09, 0x66706732, 0x32677066, \
VME__ID_FPGA3, 0, 0x5000000, 0x09, 0x66706733, 0x33677066, \
VME__ID_FPGA4, 0, 0x6000000, 0x09, 0x66706734, 0x34677066, \
VME__ID_QDC1, 0, 0x9000000, 0x09, 0x71646331, 0x31636471, \
VME__ID_QDC2, 0, 0xA000000, 0x09, 0x71646332, 0x32636471, \
VME__ID_QDC3, 0, 0xB000000, 0x09, 0x71646333, 0x33636471, \
VME__ID_1182, 0, 0x0600000, 0x39, 0x31313832, 0x32383131, \
VME__ID_1183, 0, 0x0700000, 0x39, 0x31313833, 0x33383131, \
VME__ID_QFW, 0, 0x7000000, 0x09, 0x71667731, 0x31776671 }
