roclib/src_nxyter/MainAdc.cxx (r4864/r4162)

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//============================================================================
//============================================================================

#include "nxyter/MainAdc.h"

#include <stdio.h>

#include "roc/defines_roc.h"
#include "roc/defines_spi.h"
#include "nxyter/defines_nxyter.h"


//----------------------------------------------------------------------------
nxyter::MainAdc::MainAdc() :
  base::Peripheral(),
  fUseSPI(false),
  fPort(0),
  fMode4nx(0)
{
}


//----------------------------------------------------------------------------

nxyter::MainAdc::MainAdc(base::Board* board, int port, bool mode4nx) :
  base::Peripheral(board),
  fUseSPI(false),
  fPort(port),
  fMode4nx(mode4nx)
{
   // we are not using I2C, but just check that SPI interface should be used for communication
   if (board->is_SPI_I2C()) fUseSPI = true;
}

//----------------------------------------------------------------------------

nxyter::MainAdc::~MainAdc()
{
}

//----------------------------------------------------------------------------

int nxyter::MainAdc::setRegister(uint8_t reg, uint8_t val, bool veri)
{
   bool isput[6];
   uint32_t addr[6];
   uint32_t data[6];
   int rc;


   if (isSPI()) {

      isput[0] = true;   addr[0] = ROC_SPI_COMMAND;        data[0] = 0x20;
      // FIXME: should we use fSlaveAddr instead of 0x8 << 16 ???
      isput[1] = true;   addr[1] = ROC_SPI_TXDATA;         data[1] = (0x12 << 24) | (0x00 << 16) | (reg << 8) | val;
      isput[2] = true;   addr[2] = ROC_SPI_TRANSMIT;       data[2] = 0x1;
      isput[3] = false;  addr[3] = ROC_SPI_RXDATA;         data[3] = 0x0;
      isput[4] = false;  addr[4] = ROC_SPI_MASTER_STATUS;  data[4] = 0x0;

      int nop = 5;

      rc = board().operGen(isput, addr, data, nop);

      if (rc==0) {
         if ((data[3] & 0xff00) != 0x2000) {
            printf("nxyter::MainAdc::setRegister: SPI RXDATA error\n");
            rc = base::Board::operErrBuild(base::Board::kOperBusErr, 0);
         }

         if ((data[4] & 1) != 1) {
            printf("nxyter::MainAdc::setRegister: SPI MASTER STATUS CRC-error\n");
            rc = base::Board::operErrBuild(base::Board::kOperBusErr, 0);
         }
      }

   } else {
      // determine interface addresses depending on port
      int adc_addr = (fPort==CON19) ? ROC_NX_ADC_ADDR   : ROC_NX_ADC_ADDR2;
      int adc_put  = (fPort==CON19) ? ROC_NX_ADC_REG    : ROC_NX_ADC_REG2;
      int adc_get  = (fPort==CON19) ? ROC_NX_ADC_ANSWER : ROC_NX_ADC_ANSWER2;

      isput[0] = true;  addr[0] = adc_addr;  data[0] = reg;
      isput[1] = true;  addr[1] = adc_put;   data[1] = val;
      isput[2] = true;  addr[2] = adc_addr;  data[2] = 255;
      isput[3] = true;  addr[3] = adc_put;   data[3] =   1;
      isput[4] = true;  addr[4] = adc_addr;  data[4] = reg;
      isput[5] = false; addr[5] = adc_get;

      int nop = veri ? 6 : 4;

      rc = board().operGen(isput, addr, data, nop);
      if (veri) {
         if (rc == 0 && val != (data[5]&0xff)) { // check readback value
            rc = base::Board::kOperVerifyErr;
         }
      }
   }

   return rc;
}

//----------------------------------------------------------------------------

int nxyter::MainAdc::getRegister(uint8_t reg, uint8_t& val)
{
   int rc;

   if (isSPI()) {
      bool isput[5];
      uint32_t addr[5];
      uint32_t data[5];

      isput[0] = true;   addr[0] = ROC_SPI_COMMAND;        data[0] = 0x30;
      // FIXME: should we use fSlaveAddr instead of 0x8 << 16 ???
      isput[1] = true;   addr[1] = ROC_SPI_TXDATA;         data[1] = (0x13 << 24) | (0x80 << 16) | (reg << 8) | 0;
      isput[2] = true;   addr[2] = ROC_SPI_TRANSMIT;       data[2] = 0x1;
      isput[3] = false;  addr[3] = ROC_SPI_RXDATA;         data[3] = 0x0;
      isput[4] = false;  addr[4] = ROC_SPI_MASTER_STATUS;  data[4] = 0x0;

      int nop = 5;

      rc = board().operGen(isput, addr, data, nop);

      if (rc==0) {

         val = data[3] & 0xff;

         if ((data[3] & 0xff00) != 0x3000) {
            printf("nxyter::MainAdc::getRegister: SPI RXDATA error\n");
            rc = base::Board::operErrBuild(base::Board::kOperBusErr, 0);
         }

         if ((data[4] & 1) != 1) {
            printf("nxyter::MainAdc::getRegister: SPI MASTER STATUS CRC-error\n");
            rc = base::Board::operErrBuild(base::Board::kOperBusErr, 0);
         }
      }

   } else {

      uint32_t data;

      // determine interface addresses depending on port
      int adc_addr = (fPort==CON19) ? ROC_NX_ADC_ADDR   : ROC_NX_ADC_ADDR2;
      int adc_get  = (fPort==CON19) ? ROC_NX_ADC_ANSWER : ROC_NX_ADC_ANSWER2;

      rc = board().operPG(adc_addr, reg,        // put address
                          adc_get,  data);      // get answer
      val = uint8_t(data);
   }

   return rc;
}

//----------------------------------------------------------------------------

int nxyter::MainAdc::setTestMode(int ch, uint8_t mode)
{
  int rc;
  uint8_t oldchmask;
  rc = getRegister(kReg_device_index_A, oldchmask);
  if (rc) return base::Board::operErrBuild(rc, 0);
  rc = setRegister(kReg_device_index_A, (1<<(ch&0x3)), true);
  if (rc) return base::Board::operErrBuild(rc, 1);
  rc = setRegister(kReg_test_io, mode);
  if (rc) return base::Board::operErrBuild(rc, 2);
  rc = setRegister(kReg_device_index_A, oldchmask);
  if (rc) return base::Board::operErrBuild(rc, 3);
  return 0;
}

//----------------------------------------------------------------------------

int nxyter::MainAdc::setUserPattern(uint16_t pat)
{
  int rc;
  rc = setRegister(kReg_user_patt1_lsb, uint8_t(pat & 0xff));
  if (rc) return base::Board::operErrBuild(rc, 0);
  rc = setRegister(kReg_user_patt1_msb, uint8_t((pat>>8) & 0xff));
  if (rc) return base::Board::operErrBuild(rc, 1);
  return 0;
}

//----------------------------------------------------------------------------

int nxyter::MainAdc::probe()
{
  int rc;
  uint8_t regs[4] = {kReg_user_patt1_lsb, kReg_user_patt1_msb,
                     kReg_user_patt2_lsb, kReg_user_patt2_msb};
  
  uint8_t save[4];
  uint8_t back[4];
  uint8_t patt[4] = {0xde, 0xed, 0xbe, 0xef}; // 'deadbeaf' ...

  // read and save registers
  for (int i=0; i<4; i++) {
    rc = getRegister(regs[i], save[i]);
    if (rc) return base::Board::operErrBuild(rc, i);
  }

  // write pattern
  for (int i=0; i<4; i++) {
    rc = setRegister(regs[i], patt[i]);
    if (rc) return base::Board::operErrBuild(rc, 4+i);
  }

  // write and check pattern
  for (int i=0; i<4; i++) {
    rc = getRegister(regs[i], back[i]);
    if (rc) return base::Board::operErrBuild(rc, 8+i);
    if (back[i] != patt[i]) 
      return base::Board::operErrBuild(base::Board::kOperVerifyErr, 8+i);
  }

  // restore registers
  for (int i=0; i<4; i++) {
    rc = setRegister(regs[i], save[i], true);
    if (rc) return base::Board::operErrBuild(rc, 12+i);
  }

  return 0;
}

//----------------------------------------------------------------------------

int nxyter::MainAdc::setToDefault()
{
  int rc;
  rc = setRegister(kReg_chip_port_config, 0x18, true);
  if (rc) return base::Board::operErrBuild(rc, 0);
  rc = setRegister(kReg_device_index_A,   0x0f, true);
  if (rc) return base::Board::operErrBuild(rc, 1);
  rc = setRegister(kReg_modes,            0x00, true);
  if (rc) return base::Board::operErrBuild(rc, 2);
  rc = setRegister(kReg_clock,            0x01, true);
  if (rc) return base::Board::operErrBuild(rc, 3);
  rc = setRegister(kReg_test_io,          0x00, true);
  if (rc) return base::Board::operErrBuild(rc, 4);
  rc = setRegister(kReg_output_mode,      0x00, true);
  if (rc) return base::Board::operErrBuild(rc, 5);
  rc = setRegister(kReg_output_adjust,    0x00, true);
  if (rc) return base::Board::operErrBuild(rc, 6);
  rc = setRegister(kReg_output_phase,    0x03, true);
  if (rc) return base::Board::operErrBuild(rc, 7);
  rc = setRegister(kReg_serial_control,  0x03, true); // 12 bit mode !!
  if (rc) return base::Board::operErrBuild(rc, 8);
  rc = setRegister(kReg_serial_ch_stat,  0x00, true);
  if (rc) return base::Board::operErrBuild(rc, 9);
  return 0;
}

//----------------------------------------------------------------------------

void nxyter::MainAdc::printRegisters(std::ostream& os)
{
   for (int i=0; i<35; i++) {
      const char* regname = nxyter::MainAdc::registerName(i);
      if ((regname==0) || (*regname==0)) continue;
      uint8_t val;
      getRegister(i,val);

      char sbuf[100];
      snprintf(sbuf, sizeof(sbuf), "Reg(%2d) %16s: 0x%02x %3u  ", i, regname, (unsigned) val, (unsigned) val);

      os << sbuf;

      for (int j=7; j>=0; j--) os << ((val & (1<<j)) ? " 1" : " 0");
      os << std::endl;
   }
}

//----------------------------------------------------------------------------

int nxyter::MainAdc::setChannelMux(int nxnum, uint32_t val)
{
   if (isSPI()) {
      printf("nxyter::MainAdc::setChannelMux() not implemented for SP605/SPI case\n");
      return -1;
   }

   int rc = -1;
   if (nxnum==0) rc = board().put(ROC_NX_ADC_PORT_SELECT1, val);
   if (nxnum==1) rc = board().put(ROC_NX_ADC_PORT_SELECT2, val);
   if (nxnum==2) rc = board().put(ROC_NX_ADC_PORT_SELECT3, val);
   if (nxnum==3) rc = board().put(ROC_NX_ADC_PORT_SELECT4, val);
   return rc;
}

//----------------------------------------------------------------------------

int nxyter::MainAdc::setChannelLatency(int nxnum, uint32_t val)
{
   if (isSPI()) {
      printf("nxyter::MainAdc::setChannelLatency() not implemented for SP605/SPI case\n");
      return -1;
   }

   int rc = -1;
   if (nxnum==0) rc = board().put(ROC_NX_ADC_LATENCY1, val);
   if (nxnum==1) rc = board().put(ROC_NX_ADC_LATENCY2, val);
   if (nxnum==2) rc = board().put(ROC_NX_ADC_LATENCY3, val);
   if (nxnum==3) rc = board().put(ROC_NX_ADC_LATENCY4, val);
   return rc;
}

//----------------------------------------------------------------------------

int nxyter::MainAdc::getChannelLatency(int nxnum, uint32_t& val)
{
   if (isSPI()) {
      printf("nxyter::MainAdc::getChannelLatency() not implemented for SP605/SPI case\n");
      return -1;
   }

   int rc = -1;
   if (nxnum==0) rc = board().get(ROC_NX_ADC_LATENCY1, val);
   if (nxnum==1) rc = board().get(ROC_NX_ADC_LATENCY2, val);
   if (nxnum==2) rc = board().get(ROC_NX_ADC_LATENCY3, val);
   if (nxnum==3) rc = board().get(ROC_NX_ADC_LATENCY4, val);
   return rc;
}

//----------------------------------------------------------------------------

int nxyter::MainAdc::setClockDelay(uint32_t delay)
{
   uint32_t sr_init;
   uint32_t bufg_select;

   calcClockDelayRegs(delay, sr_init, bufg_select);

   board().Debug(1, "SR_INIT:     %8.8x", sr_init);
   board().Debug(1, "BUFG_SELECT: %8.8x", bufg_select);

   int rc;
   rc = setClockDelaySrInit(sr_init);
   if (rc) return rc;
   rc = setClockDelayBufg(bufg_select);
   if (rc) return base::Board::operErrBuild(rc, 1);
   return 0;
}


//----------------------------------------------------------------------------

void nxyter::MainAdc::calcClockDelayRegs(uint32_t delay, uint32_t& sr_init, uint32_t& bufg_select)
{
   delay = delay & 0x1f;                    // only 5 bits significant
   delay = 31 - delay;                      // mirror time axis

   bufg_select = delay & 0x01;
   delay = delay >> 1;

   sr_init = 255;
   sr_init = sr_init << delay;

   sr_init += sr_init >> 16;
   sr_init &= 0xffff;
}

//----------------------------------------------------------------------------

uint32_t nxyter::MainAdc::findClockDelay(uint32_t sr_init, uint32_t bufg_select)
{
   for (uint32_t delay=0; delay<=31; delay++) {
      uint32_t sr_init1;
      uint32_t bufg_select1;

      calcClockDelayRegs(delay, sr_init1, bufg_select1);

      if ((sr_init1==sr_init) && (bufg_select1==bufg_select)) return delay;
   }

   return 0xffff;
}

//----------------------------------------------------------------------------

int nxyter::MainAdc::setClockDelaySrInit(uint32_t val)
{
   if (isSPI()) {
      printf("nxyter::MainAdc::setClockDelaySrInit() not implemented for SP605/SPI case\n");
      return -1;
   }

   return board().put((fPort==CON19) ? ROC_NX_SR_INIT : ROC_NX_SR_INIT2, val);
}

//----------------------------------------------------------------------------

int nxyter::MainAdc::getClockDelaySrInit(uint32_t& val)
{
   if (isSPI()) {
      printf("nxyter::MainAdc::getClockDelaySrInit() not implemented for SP605/SPI case\n");
      return -1;
   }

   return board().get((fPort==CON19) ? ROC_NX_SR_INIT : ROC_NX_SR_INIT2, val);
}

//----------------------------------------------------------------------------

int nxyter::MainAdc::setClockDelayBufg(uint32_t val)
{
   if (isSPI()) {
      printf("nxyter::MainAdc::setClockDelayBufg() not implemented for SP605/SPI case\n");
      return -1;
   }

   return board().put((fPort==CON19) ? ROC_NX_BUFG_SELECT : ROC_NX_BUFG_SELECT2, val);
}


//----------------------------------------------------------------------------

int nxyter::MainAdc::getClockDelayBufg(uint32_t& val)
{
   if (isSPI()) {
      printf("nxyter::MainAdc::getClockDelayBufg() not implemented for SP605/SPI case\n");
      return -1;
   }

   return board().get((fPort==CON19) ? ROC_NX_BUFG_SELECT : ROC_NX_BUFG_SELECT2, val);
}

//----------------------------------------------------------------------------

int nxyter::MainAdc::getAdcDirect(int num, uint32_t& val)
{
   // Note: for 1nx and 2nx the fPort denotes the control and the data interface
   //       for 4nx fPort=CON19(0) denotes the control interface, while the data
   //       interface is on CON20(1). This is handled by the line below.
   int port = fMode4nx ? CON20 : fPort;
   int rc = -1;


   if (isSPI()) {
      printf("nxyter::MainAdc::getAdcDirect() not implemented for SP605/SPI case\n");
   } else {
      if (port==CON19) {
         if (num==ADC_PORT_A) rc = board().get(ROC_NX_ADC_DIRECT_1a, val);
         if (num==ADC_PORT_B) rc = board().get(ROC_NX_ADC_DIRECT_1b, val);
         if (num==ADC_PORT_C) rc = board().get(ROC_NX_ADC_DIRECT_1c, val);
         if (num==ADC_PORT_D) rc = board().get(ROC_NX_ADC_DIRECT_1d, val);
      } else {
         if (num==ADC_PORT_A) rc = board().get(ROC_NX_ADC_DIRECT_2a, val);
         if (num==ADC_PORT_B) rc = board().get(ROC_NX_ADC_DIRECT_2b, val);
         if (num==ADC_PORT_C) rc = board().get(ROC_NX_ADC_DIRECT_2c, val);
         if (num==ADC_PORT_D) rc = board().get(ROC_NX_ADC_DIRECT_2d, val);
      }
   }

   return rc;
}

//----------------------------------------------------------------------------

const char* nxyter::MainAdc::registerName(int reg) 
{
  static const char* names[35] =
      { "chip_port_config",   // reg 0x00
        "chip_id",            // reg 0x01
        "chip_grade",         // reg 0x02
        "",                   // reg 0x03
        "",                   // reg 0x04
        "device_index_A",     // reg 0x05
        "",                   // reg 0x06
        "",                   // reg 0x07
        "modes",              // reg 0x08
        "clock",              // reg 0x09
        "",                   // reg 0x0a
        "",                   // reg 0x0b
        "",                   // reg 0x0c
        "test_io",            // reg 0x0d
        "",                   // reg 0x0e
        "",                   // reg 0x0f
        "",                   // reg 0x10
        "",                   // reg 0x11
        "",                   // reg 0x12
        "",                   // reg 0x13
        "output_mode",        // reg 0x14
        "output_adjust",      // reg 0x15
        "output_phase",       // reg 0x16
        "",                   // reg 0x17
        "",                   // reg 0x18
        "user_patt1_lsb",     // reg 0x19
        "user_patt1_msb",     // reg 0x1a
        "user_patt2_lsb",     // reg 0x1b
        "user_patt2_msb",     // reg 0x1c
        "",                   // reg 0x1d
        "",                   // reg 0x1e
        "",                   // reg 0x1f
        "",                   // reg 0x20
        "serial_control",     // reg 0x21
        "serial_ch_stat"      // reg 0x22
     };
  
  if (reg == 255) return "device_update";
  if (reg < 0 || reg >=35) return "";
  return names[reg];
}

void nxyter::MainAdc::addAddrMap(base::Board* board)
{
   if (board->is_SPI_I2C()) {
      board->addRegAddrMapping("ROC_SPI_COMMAND", ROC_SPI_COMMAND);
      board->addRegAddrMapping("ROC_SPI_TXDATA", ROC_SPI_TXDATA);
      board->addRegAddrMapping("ROC_SPI_TRANSMIT", ROC_SPI_TRANSMIT);
      board->addRegAddrMapping("ROC_SPI_RXDATA", ROC_SPI_RXDATA);
      board->addRegAddrMapping("ROC_SPI_MASTER_STATUS", ROC_SPI_MASTER_STATUS);
   } else {
      board->addRegAddrMapping("ROC_NX_ADC_DIRECT_1a", ROC_NX_ADC_DIRECT_1a);
      board->addRegAddrMapping("ROC_NX_ADC_DIRECT_1b", ROC_NX_ADC_DIRECT_1b);
      board->addRegAddrMapping("ROC_NX_ADC_DIRECT_1c", ROC_NX_ADC_DIRECT_1c);
      board->addRegAddrMapping("ROC_NX_ADC_DIRECT_1d", ROC_NX_ADC_DIRECT_1d);
      board->addRegAddrMapping("ROC_NX_ADC_DIRECT_2a", ROC_NX_ADC_DIRECT_2a);
      board->addRegAddrMapping("ROC_NX_ADC_DIRECT_2b", ROC_NX_ADC_DIRECT_2b);
      board->addRegAddrMapping("ROC_NX_ADC_DIRECT_2c", ROC_NX_ADC_DIRECT_2c);
      board->addRegAddrMapping("ROC_NX_ADC_DIRECT_2d", ROC_NX_ADC_DIRECT_2d);
      board->addRegAddrMapping("ROC_NX_ADC_REG", ROC_NX_ADC_REG);
      board->addRegAddrMapping("ROC_NX_ADC_ADDR", ROC_NX_ADC_ADDR);
      board->addRegAddrMapping("ROC_NX_ADC_ANSWER", ROC_NX_ADC_ANSWER);
      board->addRegAddrMapping("ROC_NX_ADC_REG2", ROC_NX_ADC_REG2);
      board->addRegAddrMapping("ROC_NX_ADC_ADDR2", ROC_NX_ADC_ADDR2);
      board->addRegAddrMapping("ROC_NX_ADC_ANSWER2", ROC_NX_ADC_ANSWER2);
      board->addRegAddrMapping("ROC_NX_SR_INIT", ROC_NX_SR_INIT);
      board->addRegAddrMapping("ROC_NX_BUFG_SELECT", ROC_NX_BUFG_SELECT);
      board->addRegAddrMapping("ROC_NX_SR_INIT2", ROC_NX_SR_INIT2);
      board->addRegAddrMapping("ROC_NX_BUFG_SELECT2", ROC_NX_BUFG_SELECT2);
      board->addRegAddrMapping("ROC_NX_ADC_LATENCY1", ROC_NX_ADC_LATENCY1);
      board->addRegAddrMapping("ROC_NX_ADC_LATENCY2", ROC_NX_ADC_LATENCY2);
      board->addRegAddrMapping("ROC_NX_ADC_LATENCY3", ROC_NX_ADC_LATENCY3);
      board->addRegAddrMapping("ROC_NX_ADC_LATENCY4", ROC_NX_ADC_LATENCY4);
      board->addRegAddrMapping("ROC_NX_ADC_PORT_SELECT1", ROC_NX_ADC_PORT_SELECT1);
      board->addRegAddrMapping("ROC_NX_ADC_PORT_SELECT2", ROC_NX_ADC_PORT_SELECT2);
      board->addRegAddrMapping("ROC_NX_ADC_PORT_SELECT3", ROC_NX_ADC_PORT_SELECT3);
      board->addRegAddrMapping("ROC_NX_ADC_PORT_SELECT4", ROC_NX_ADC_PORT_SELECT4);
   }
}