roclib/src_nxyter/RocNx.cxx (r4864/r4162)

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#include <cmath>

#include <stdlib.h>

#include "nxyter/RocNx.h"
#include "nxyter/defines_nxyter.h"
#include "roc/defines_roc.h"

//using roc::Board;

//----------------------------------------------------------------------------

nxyter::RocNx::RocNx(base::Board* board) :
  base::Peripheral(board)
{
}

//----------------------------------------------------------------------------

nxyter::RocNx::~RocNx()
{
}

//----------------------------------------------------------------------------

int nxyter::RocNx::setToDefault()
{
  unsigned initlist[] = {
    ROC_NX_NXACTIVE,           0,              // deactivate all nx
    ROC_NX_FEB4NX,             0,
    ROC_NX_PARITY_CHECK,       1,              // enable nx parity check
    ROC_NX_ADC_PORT_SELECT1,   1,              // adc port select for Feb1nx
    ROC_NX_ADC_PORT_SELECT2,   0,
    ROC_NX_ADC_PORT_SELECT3,   1,
    ROC_NX_ADC_PORT_SELECT4,   0,
    ROC_NX_SR_INIT,       0xfc03,              // adc delay 11
    ROC_NX_BUFG_SELECT,        0,
    ROC_NX_SR_INIT2,      0xfc03,              // adc delay 11
    ROC_NX_BUFG_SELECT2,       0,
    ROC_NX_ADC_LATENCY1,      65,              // good for all cables
    ROC_NX_ADC_LATENCY2,      65,
    ROC_NX_ADC_LATENCY3,      65,
    ROC_NX_ADC_LATENCY4,      65,
    ROC_NX_DELAY_LTS,        512,              // !! the holy default !!
    ROC_NX_DELAY_NX0,        288,              // good for iDUR=15 and all cables
    ROC_NX_DELAY_NX1,        288,
    ROC_NX_DELAY_NX2,        288,
    ROC_NX_DELAY_NX3,        288,
    ROC_NX_DEBUG_MODE,         0,              // make sure it's off
    0xffffffff,    0xffffffff               // end marker
  };

  for (unsigned* p=initlist; p[0]!=0xffffffff; p+=2) {
    int rc = board().put(p[0], p[1]);
    if (rc) return base::Board::operErrBuild(rc, (p-initlist)/2);
  }
  return 0;
}


//----------------------------------------------------------------------------

int nxyter::RocNx::resetRocNxTs()
{
   base::OperList lst;

   lst.addPut(ROC_NX_TS_RESET, 1);
   lst.addPut(ROC_NX_TS_RESET, 0);

   return board().operGen(lst);
}


//----------------------------------------------------------------------------

int nxyter::RocNx::fireTestPulse(uint32_t period, int32_t width, 
                                 uint32_t number)
{
   uint32_t llow, lhigh;

   if (period == 0) {                       // setup abort sequence
     period = 6;
     width  = 3;
     number = 1;
   }

   if (width > 0) {
     llow  = period - width;
     lhigh = width;
   } else {
     llow  = -width;
     lhigh = period + width;
   }

   if (number > 0x00008fff || width == 0 || labs(width) >= period || 
       llow > 0x00ffffff || lhigh > 0x00ffffff) {
     return -1;
   }

   int rc = board().operPPPP(ROC_NX_TESTPULSE_LENGTH,  llow - 1,
                             ROC_NX_TESTPULSE_LENGTH2, lhigh - 1,
                             ROC_NX_TESTPULSE_NUMBER, number * 2,
                             ROC_NX_TESTPULSE_START, 1);
   return rc;
}

//----------------------------------------------------------------------------

int nxyter::RocNx::fireTestPulse(uint32_t delay, uint32_t period, int32_t width,
                                  uint32_t number)
{
   int rc;

   uint32_t llow, lhigh;
   if (width > 0) {
     llow  = period - width;
     lhigh = width;
   } else {
     llow  = -width;
     lhigh = period + width;
   }
   if (number > 0x00008fff || width == 0 || labs(width) >= period || 
       delay > 0x0000ffff ||
       llow > 0x00ffffff || lhigh > 0x00ffffff) {
     return -1;
   }

   rc = board().operPPPP(ROC_NX_TESTPULSE_RESET_DELAY, delay  - 1,
                         ROC_NX_TESTPULSE_LENGTH,  llow - 1,
                         ROC_NX_TESTPULSE_LENGTH2, lhigh - 1,
                         ROC_NX_TESTPULSE_NUMBER, number * 2);
   if (rc) return rc;
   rc = resetRocNxTs();
   if (rc) return base::Board::operErrBuild(rc, 4);
   return 0;
}

//----------------------------------------------------------------------------

int nxyter::RocNx::setNxActive(int nx0, int nx1, int nx2, int nx3)
{
   int rc = setNxActive((nx0 ? 1 : 0) | (nx1 ? 2 : 0) |
                        (nx2 ? 4 : 0) | (nx3 ? 8 : 0));
   return rc;
}

//----------------------------------------------------------------------------

int nxyter::RocNx::setNxActive(uint32_t mask)
{
   return board().put(ROC_NX_NXACTIVE, mask & 0xf);
}

//----------------------------------------------------------------------------

int nxyter::RocNx::getNxActive(uint32_t& mask)
{
   return board().get(ROC_NX_NXACTIVE, mask);
}

//----------------------------------------------------------------------------

int nxyter::RocNx::setLTSDelay(uint32_t val)
{
   return board().put(ROC_NX_DELAY_LTS, val);
}

//----------------------------------------------------------------------------

int nxyter::RocNx::setParityCheck(uint32_t val)
{
   return board().put(ROC_NX_PARITY_CHECK, val);
}

//----------------------------------------------------------------------------

int nxyter::RocNx::setDebugMode(uint32_t val)
{
   return board().put(ROC_NX_DEBUG_MODE, val);
}

//----------------------------------------------------------------------------

int nxyter::RocNx::getFifoFull(uint32_t& val)
{
   return board().get(ROC_NX_FIFO_FULL, val);
}

//----------------------------------------------------------------------------

int nxyter::RocNx::getFifoEmpty(uint32_t& val)
{
   return board().get(ROC_NX_FIFO_EMPTY, val);
}

//----------------------------------------------------------------------------

int nxyter::RocNx::getDataDebug(std::vector<nxyter::DataDebug>& datvec, 
                                int nmsg)
{
  bool isput[5];
  uint32_t addr[5];
  uint32_t data[5];
  int rc;

  isput[0] = false;  addr[0] = ROC_NX_DEBUG_MODE; 
  isput[1] = false;  addr[1] = ROC_NX_FIFO_EMPTY;

  rc = board().operGen(isput, addr, data, 2);

  if (rc) return -2;                        // io error
  if (data[0] == 0) return -1;              // not in debug mode
  if (data[1] != 0) return 0;               // fifo empty, quit

  isput[0] = false;  addr[0] = ROC_NX_ADC_DATA;
  isput[1] = false;  addr[1] = ROC_NX_NX_DATA;
  isput[2] = false;  addr[2] = ROC_NX_LT_LOW;
  isput[3] = false;  addr[3] = ROC_NX_LT_HIGH;
  isput[4] = false;  addr[4] = ROC_NX_FIFO_EMPTY;

  int nget = 0;
  while(nget < nmsg) {
    rc = board().operGen(isput, addr, data, 5);
    if (rc) return -2;                      // io error
    datvec.push_back(nxyter::DataDebug(data[0], data[1], data[2], data[3]));
    nget += 1;
    if (data[4] != 0) break;             // fifo empty, quit
  }
  return nget;
}

//----------------------------------------------------------------------------

void nxyter::RocNx::addAddrMap(base::Board* board, unsigned hw_kind)
{
   if ((hw_kind != base::kind_nXYTER) && (hw_kind != base::kind_newNX)) return;

   board->addRegAddrMapping("ROC_NX_HWV", ROC_NX_HWV);
   board->addRegAddrMapping("ROC_NX_FIFO_RESET", ROC_NX_FIFO_RESET);
   board->addRegAddrMapping("ROC_NX_THROTTLE", ROC_NX_THROTTLE);
   board->addRegAddrMapping("ROC_NX_INIT", ROC_NX_INIT);
   board->addRegAddrMapping("ROC_NX_TS_RESET", ROC_NX_TS_RESET);
   board->addRegAddrMapping("ROC_NX_BURST1", ROC_NX_BURST1);
   board->addRegAddrMapping("ROC_NX_BURST2", ROC_NX_BURST2);
   board->addRegAddrMapping("ROC_NX_BURST3", ROC_NX_BURST3);
   board->addRegAddrMapping("ROC_NX_TESTPULSE_RESET_DELAY", ROC_NX_TESTPULSE_RESET_DELAY);
   board->addRegAddrMapping("ROC_NX_TESTPULSE_LENGTH", ROC_NX_TESTPULSE_LENGTH);
   board->addRegAddrMapping("ROC_NX_TESTPULSE_LENGTH2", ROC_NX_TESTPULSE_LENGTH2);
   board->addRegAddrMapping("ROC_NX_TESTPULSE_NUMBER", ROC_NX_TESTPULSE_NUMBER);
   board->addRegAddrMapping("ROC_NX_TESTPULSE_START", ROC_NX_TESTPULSE_START);
   board->addRegAddrMapping("ROC_NX_TESTPULSE_RUNNING", ROC_NX_TESTPULSE_RUNNING);
   board->addRegAddrMapping("ROC_NX_NXACTIVE", ROC_NX_NXACTIVE);
   board->addRegAddrMapping("ROC_NX_FEB4NX", ROC_NX_FEB4NX);
   board->addRegAddrMapping("ROC_NX_PARITY_CHECK", ROC_NX_PARITY_CHECK);
   board->addRegAddrMapping("ROC_NX_I2C_RESET", ROC_NX_I2C_RESET);
   board->addRegAddrMapping("ROC_NX_I2C_REGRESET", ROC_NX_I2C_REGRESET);
   board->addRegAddrMapping("ROC_NX_DELAY_LTS", ROC_NX_DELAY_LTS);
   board->addRegAddrMapping("ROC_NX_DELAY_NX0", ROC_NX_DELAY_NX0);
   board->addRegAddrMapping("ROC_NX_DELAY_NX1", ROC_NX_DELAY_NX1);
   board->addRegAddrMapping("ROC_NX_DELAY_NX2", ROC_NX_DELAY_NX2);
   board->addRegAddrMapping("ROC_NX_DELAY_NX3", ROC_NX_DELAY_NX3);
   board->addRegAddrMapping("ROC_NX_DEBUG_MODE", ROC_NX_DEBUG_MODE);
   board->addRegAddrMapping("ROC_NX_FIFO_EMPTY", ROC_NX_FIFO_EMPTY);
   board->addRegAddrMapping("ROC_NX_FIFO_FULL", ROC_NX_FIFO_FULL);
   board->addRegAddrMapping("ROC_NX_LT_LOW", ROC_NX_LT_LOW);
   board->addRegAddrMapping("ROC_NX_LT_HIGH", ROC_NX_LT_HIGH);
   board->addRegAddrMapping("ROC_NX_ADC_DATA", ROC_NX_ADC_DATA);
   board->addRegAddrMapping("ROC_NX_NX_DATA", ROC_NX_NX_DATA);
}

//----------------------------------------------------------------------------